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1.
Nat Commun ; 15(1): 3492, 2024 Apr 25.
Artigo em Inglês | MEDLINE | ID: mdl-38664381

RESUMO

CMOS-RRAM integration holds great promise for low energy and high throughput neuromorphic computing. However, most RRAM technologies relying on filamentary switching suffer from variations and noise, leading to computational accuracy loss, increased energy consumption, and overhead by expensive program and verify schemes. We developed a filament-free, bulk switching RRAM technology to address these challenges. We systematically engineered a trilayer metal-oxide stack and investigated the switching characteristics of RRAM with varying thicknesses and oxygen vacancy distributions to achieve reliable bulk switching without any filament formation. We demonstrated bulk switching at megaohm regime with high current nonlinearity, up to 100 levels without compliance current. We developed a neuromorphic compute-in-memory platform and showcased edge computing by implementing a spiking neural network for an autonomous navigation/racing task. Our work addresses challenges posed by existing RRAM technologies and paves the way for neuromorphic computing at the edge under strict size, weight, and power constraints.

2.
Nat Biomed Eng ; 7(10): 1307-1320, 2023 Oct.
Artigo em Inglês | MEDLINE | ID: mdl-37770754

RESUMO

Owing to the proximity of the ear canal to the central nervous system, in-ear electrophysiological systems can be used to unobtrusively monitor brain states. Here, by taking advantage of the ear's exocrine sweat glands, we describe an in-ear integrated array of electrochemical and electrophysiological sensors placed on a flexible substrate surrounding a user-generic earphone for the simultaneous monitoring of lactate concentration and brain states via electroencephalography, electrooculography and electrodermal activity. In volunteers performing an acute bout of exercise, the device detected elevated lactate levels in sweat concurrently with the modulation of brain activity across all electroencephalography frequency bands. Simultaneous and continuous unobtrusive in-ear monitoring of metabolic biomarkers and brain electrophysiology may allow for the discovery of dynamic and synergetic interactions between brain and body biomarkers in real-world settings for long-term health monitoring or for the detection or monitoring of neurodegenerative diseases.

3.
IEEE Trans Electron Devices ; 69(4): 2137-2144, 2022 Apr.
Artigo em Inglês | MEDLINE | ID: mdl-37168652

RESUMO

Real-time spike sorting and processing are crucial for closed-loop brain-machine interfaces and neural prosthetics. Recent developments in high-density multi-electrode arrays with hundreds of electrodes have enabled simultaneous recordings of spikes from a large number of neurons. However, the high channel count imposes stringent demands on real-time spike sorting hardware regarding data transmission bandwidth and computation complexity. Thus, it is necessary to develop a specialized real-time hardware that can sort neural spikes on the fly with high throughputs while consuming minimal power. Here, we present a real-time, low latency spike sorting processor that utilizes high-density CuOx resistive crossbars to implement in-memory spike sorting in a massively parallel manner. We developed a fabrication process which is compatible with CMOS BEOL integration. We extensively characterized switching characteristics and statistical variations of the CuOx memory devices. In order to implement spike sorting with crossbar arrays, we developed a template matching-based spike sorting algorithm that can be directly mapped onto RRAM crossbars. By using synthetic and in vivo recordings of extracellular spikes, we experimentally demonstrated energy efficient spike sorting with high accuracy. Our neuromorphic interface offers substantial improvements in area (~1000× less area), power (~200× less power), and latency (4.8µs latency for sorting 100 channels) for real-time spike sorting compared to other hardware implementations based on FPGAs and microcontrollers.

4.
Front Neurosci ; 15: 797654, 2021.
Artigo em Inglês | MEDLINE | ID: mdl-35173573

RESUMO

We present an efficient and scalable partitioning method for mapping large-scale neural network models with locally dense and globally sparse connectivity onto reconfigurable neuromorphic hardware. Scalability in computational efficiency, i.e., amount of time spent in actual computation, remains a huge challenge in very large networks. Most partitioning algorithms also struggle to address the scalability in network workloads in finding a globally optimal partition and efficiently mapping onto hardware. As communication is regarded as the most energy and time-consuming part of such distributed processing, the partitioning framework is optimized for compute-balanced, memory-efficient parallel processing targeting low-latency execution and dense synaptic storage, with minimal routing across various compute cores. We demonstrate highly scalable and efficient partitioning for connectivity-aware and hierarchical address-event routing resource-optimized mapping, significantly reducing the total communication volume recursively when compared to random balanced assignment. We showcase our results working on synthetic networks with varying degrees of sparsity factor and fan-out, small-world networks, feed-forward networks, and a hemibrain connectome reconstruction of the fruit-fly brain. The combination of our method and practical results suggest a promising path toward extending to very large-scale networks and scalable hardware-aware partitioning.

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